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yosys/tests
Jannis Harder ca5b910296 opt_merge: Add -keepdc option required for formal verification
The `-keepdc` option prevents merging flipflops with dont-care bits in
their initial value, as, in general, this is not a valid transform for
formal verification.

The keepdc option of `opt` is passed along to `opt_merge` now.
2022-04-01 21:03:20 +02:00
..
aiger switch argument order to work with macOS getopt 2020-09-23 12:48:26 +02:00
arch intel_alm: M10K write-enable is negative-true 2022-03-09 20:18:06 +00:00
asicworld
bind Add support for parsing the SystemVerilog 'bind' construct 2021-07-16 09:31:39 -04:00
blif tests/blif: Add missing gitignore 2021-05-20 12:49:51 +02:00
bram Fix the tests we just broke 2021-12-10 00:22:37 +01:00
errors
fsm
hana
liberty
lut
memfile
memories Fix the tests we just broke 2021-12-10 00:22:37 +01:00
opt opt_merge: Add -keepdc option required for formal verification 2022-04-01 21:03:20 +02:00
opt_share
proc proc_prune: Make assign removal and promotion per-bit, remember promoted bits. 2021-08-14 15:26:11 +02:00
realmath
rpc
sat Proper example code 2022-03-14 15:39:11 +01:00
select
share
sim test dlatchsr and adlatch 2022-02-16 13:58:51 +01:00
simple Fix valgrind tests when using verific 2022-03-30 17:25:53 +02:00
simple_abc9 abc9: fix SCC issues (#2694) 2021-03-29 22:01:57 -07:00
smv
sva
svinterfaces Add a test for interfaces on modules loaded on-demand 2021-07-14 22:54:50 -04:00
svtypes sv: improve support for wire and var with user-defined types 2021-08-12 22:41:41 -06:00
techmap Fix the tests we just broke 2021-12-10 00:22:37 +01:00
tools Fixes in vcdcd.pl for newer Perl versions 2021-10-19 10:56:43 +02:00
unit
various fix handling of escaped chars in json backend and frontend 2022-02-18 17:13:09 +01:00
verilog verilog: support for time scale delay values 2022-02-14 15:58:31 +01:00
vloghtb Use HTTPS for website links, gatecat email 2021-06-09 12:16:56 +02:00
gen-tests-makefile.sh