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Code Activity
yosys/tests/arch/common
History
Diego H 937ec1ee78 Updating RAMB36E1 thresholds. Adding test for both RAMB18E1/RAMB36E1
2019-12-12 13:50:36 -06:00
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add_sub.v Unify verilog style 2019-10-18 12:50:24 +02:00
adffs.v Unify verilog style 2019-10-18 12:50:24 +02:00
counter.v fixed error 2019-10-18 13:15:36 +02:00
dffs.v Unify verilog style 2019-10-18 12:50:24 +02:00
fsm.v Unify verilog style 2019-10-18 12:50:24 +02:00
latches.v Unify verilog style 2019-10-18 12:50:24 +02:00
logic.v Unify verilog style 2019-10-18 12:50:24 +02:00
memory.v Common memory test now shared 2019-10-18 12:33:35 +02:00
memory_params.v Updating RAMB36E1 thresholds. Adding test for both RAMB18E1/RAMB36E1 2019-12-12 13:50:36 -06:00
mul.v Unify verilog style 2019-10-18 12:50:24 +02:00
mux.v Unify verilog style 2019-10-18 12:50:24 +02:00
shifter.v Unify verilog style 2019-10-18 12:50:24 +02:00
tribuf.v Unify verilog style 2019-10-18 12:50:24 +02:00