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			359 lines
		
	
	
	
		
			6.9 KiB
		
	
	
	
		
			Text
		
	
	
	
	
	
			
		
		
	
	
			359 lines
		
	
	
	
		
			6.9 KiB
		
	
	
	
		
			Text
		
	
	
	
	
	
| /********************************************/
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| /*                                          */
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| /* Supergate cell library for Bench marking */
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| /*                                          */
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| /* Symbiotic EDA GmbH / Moseley Instruments */
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| /* Niels A. Moseley                         */
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| /*                                          */
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| /* Process: none                            */
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| /*                                          */
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| /* Date   : 02-11-2018                      */
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| /* Version: 1.0                             */
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| /*                                          */
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| /********************************************/
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| 
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| library(supergate) {
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|   technology (cmos);
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|   revision : 1.0;
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|   
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|   time_unit                     : "1ps";
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|   pulling_resistance_unit       : "1kohm";  
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|   voltage_unit                  : "1V";
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|   current_unit                  : "1uA";  
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|   
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|   capacitive_load_unit(1,ff);
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|   
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|   default_inout_pin_cap         :  7.0;
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|   default_input_pin_cap         :  7.0;
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|   default_output_pin_cap        :  0.0;
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|   default_fanout_load           :  1.0;
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| 
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|   default_wire_load_capacitance : 0.1;
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|   default_wire_load_resistance  : 1.0e-3;
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|   default_wire_load_area        : 0.0;
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| 
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|   nom_process                   :  1.0;
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|   nom_temperature               : 25.0;
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|   nom_voltage                   :  1.2;
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|   
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|   delay_model                   : generic_cmos;
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|   
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|   /* Inverter */
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|   cell (inv) {
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|     area : 1;
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|     pin(A) {
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|       direction : input;
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|     }
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|     
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|     pin(Y) {
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|       direction : output;
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|       function : "A'";
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|     }
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|   }
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|   
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|   /* tri-state inverter */
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|   cell (tri_inv) {
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|     area : 4;
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|     pin(A) {
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|       direction : input;    
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|     }
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|     pin(S) {
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|       direction : input;
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|     }
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|     pin(Z) {
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|       direction : output;
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|       function  : "A'";
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|       three_State : "S'";
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|     }
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|   }
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|   
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|   cell (buffer) {
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|     area : 5;
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|     pin(A) {
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|       direction : input;
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|     }
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|     pin(Y) {
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|       direction : output;
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|       function : "A";
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|     }
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|   }  
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|   
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|   /* 2-input NAND gate */
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|   cell (nand2) {
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|     area : 3;
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|     pin(A) {
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|       direction : input;
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|     }
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|     pin(B) {
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|       direction : input;
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|     }
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|     pin(Y) {
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|       direction: output;
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|       function : "(A * B)'";
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|     }
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|   }
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|   
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|   /* 2-input NOR gate */
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|   cell (nor2) {
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|     area : 3;
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|     pin(A) {
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|       direction : input;
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|     }
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|     pin(B) {
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|       direction : input;
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|     }
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|     pin(Y) {
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|       direction: output;
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|       function : "(A + B)'";
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|     }
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|   }
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|   
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|   /* 2-input XOR */
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|   cell (xor2) {
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|     area : 6;
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|     pin(A) {
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|       direction : input;
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|     }
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|     pin(B) {
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|       direction : input;
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|     }
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|     pin(Y) {
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|       direction: output;
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|       function : "(A *B') + (A' * B)";
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|     }
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|   }
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|   
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|   /* 2-input inverting MUX */
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|   cell (imux2) {
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|     area : 5;
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|     pin(A) {
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|       direction : input;
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|     }
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|     pin(B) {
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|       direction : input;
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|     }
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|     pin(S) {
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|       direction : input;
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|     } 
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|     pin(Y) {
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|       direction: output;
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|       function : "( (A * S) + (B * S') )'";
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|     }
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|   }
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|   
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|   /* D-type flip-flop with asynchronous reset and preset */
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|   cell (dff) {
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|     area : 6;
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|     ff("IQ", "IQN") {
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|       next_state : "D";
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|       clocked_on : "CLK";
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|       clear      : "RESET";
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|       preset     : "PRESET";
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|       clear_preset_var1 : L;
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|       clear_preset_var2 : L;
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|     } 
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|     pin(D) {
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|       direction : input;
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|     }
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|     pin(CLK) {
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|       direction : input;
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|     }
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|     pin(RESET) {
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|       direction : input;
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|     }
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|     pin(PRESET) {
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|       direction : input;
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|     }
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|     pin(Q) {
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|       direction: output;
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|       function : "IQ";
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|       timing() {
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|         timing_type : rising_edge;
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|         intrinsic_rise : 65;
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|         intrinsic_fall : 65;
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|         rise_resistance : 0;
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|         fall_resistance : 0; 
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|         related_pin : "CLK";
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|       }
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|       timing () {
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|         timing_type : clear;
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|         timing_sense : positive_unate;
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|         intrinsic_fall : 75;
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|         related_pin : "RESET";
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|       }
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|       timing () {
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|         timing_type : preset;
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|         timing_sense : negative_unate;
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|         intrinsic_rise : 75;
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|         related_pin : "PRESET";
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|       }      
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|     }
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|     pin(QN) {
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|       direction: output;
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|       function : "IQN";
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|       timing() {
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|         timing_type : rising_edge;
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|         intrinsic_rise : 65;
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|         intrinsic_fall : 65;
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|         rise_resistance : 0;
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|         fall_resistance : 0; 
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|         related_pin : "CLK";
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|       }
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|       timing () {
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|         timing_type : preset;
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|         timing_sense : negative_unate;
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|         intrinsic_rise : 75;
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|         related_pin : "RESET";
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|       }
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|       timing () {
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|         timing_type : clear;
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|         timing_sense : positive_unate;
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|         intrinsic_fall : 75;
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|         related_pin : "PRESET";
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|       }      
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|     } 
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|   }
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| 
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|   /* Latch */
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|   cell(latch) {
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|     area : 5;
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|     latch ("IQ","IQN") {
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|       enable : "G";
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|       data_in : "D";
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|     }
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| 
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|     pin(D) {
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|       direction : input;
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|     }
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|     pin(G) {
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|       direction : input;
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|     }
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|  
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|     pin(Q) {
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|       direction : output;
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|       function : "IQ";
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|       internal_node : "Q";
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|       
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|       timing() {
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|         timing_type : rising_edge;
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|         intrinsic_rise : 65;
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|         intrinsic_fall : 65;
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|         rise_resistance : 0;
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|         fall_resistance : 0;
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|         related_pin : "G";
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|       }
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|       
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|       timing() {
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|         timing_sense : positive_unate;
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|         intrinsic_rise : 65;
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|         intrinsic_fall : 65;
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|         rise_resistance : 0;
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|         fall_resistance : 0;
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|         related_pin : "D";
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|       }
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|     }
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|     
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|     pin(QN) {
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|       direction : output;
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|       function : "IQN";
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|       internal_node : "QN";
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|       
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|       timing() {
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|         timing_type : rising_edge;
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|         intrinsic_rise : 65;
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|         intrinsic_fall : 65;
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|         rise_resistance : 0;
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|         fall_resistance : 0;
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|         related_pin : "G";
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|       }
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|       
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|       timing() {
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|         timing_sense : negative_unate;
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|         intrinsic_rise : 65;
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|         intrinsic_fall : 65;
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|         rise_resistance : 0;
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|         fall_resistance : 0;
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|         related_pin : "D";
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|       }
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|     }
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|   }
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| 
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|   /* 3 input AND-OR-INVERT gate */
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|   cell (aoi211) {
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|     area : 3;
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|     pin(A) {
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|       direction : input;
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|     }
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|     pin(B) {
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|       direction : input;
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|     }
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|     pin(C) {
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|       direction : input;
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|     }    
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|     pin(Y) {
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|       direction: output;
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|       function : "((A * B) + C)'";
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|     }
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|   }
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| 
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| 
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|   /* 3 input OR-AND-INVERT gate */
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|   cell (oai211) {
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|     area : 3;
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|     pin(A) {
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|       direction : input;
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|     }
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|     pin(B) {
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|       direction : input;
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|     }
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|     pin(C) {
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|       direction : input;
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|     }    
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|     pin(Y) {
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|       direction: output;
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|       function : "((A + B) * C)'";
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|     }
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|   }
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| 
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|   /* half adder */
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|   cell (halfadder) {
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|     area : 5;
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|     pin(A) {
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|       direction : input;
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|     }
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|     pin(B) {
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|       direction : input;
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|     }
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|     pin(C) {
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|       direction : output;
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|       function  : "(A * B)";
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|     }    
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|     pin(Y) {
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|       direction: output;
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|       function : "(A *B') + (A' * B)";
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|     }    
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|   }
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| 
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|   /* full adder */
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|   cell (fulladder) {
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|     area : 8;
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|     pin(A) {
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|       direction : input;
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|     }
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|     pin(B) {
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|       direction : input;
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|     }
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|     pin(CI) {
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|       direction : input;
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|     }    
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|     pin(CO) {
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|       direction : output;
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|       function : "(((A * B)+(B * CI))+(CI * A))";
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|     }
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|     pin(Y) {
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|       direction: output;
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|       function : "((A^B)^CI)";
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|     }    
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|   }
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| 
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| } /* end */
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