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yosys/techlibs/xilinx
2019-07-11 13:54:40 -07:00
..
tests
.gitignore
abc_ff.v Simplify to $__ABC_ASYNC box 2019-07-11 10:52:33 -07:00
abc_xc7.box $pastQ should be first input 2019-07-11 13:54:40 -07:00
abc_xc7.lut
abc_xc7_nowide.lut
arith_map.v
brams.txt
brams_bb.v
brams_init.py
brams_map.v
cells_map.v Add some spacing 2019-07-10 12:32:33 -07:00
cells_sim.v Revert "Fix broken MUXFx box, use MUXF7x2 box instead" 2019-07-01 14:01:09 -07:00
cells_xtra.sh
cells_xtra.v
drams.txt
drams_map.v
ff_map.v Restore from master 2019-07-10 22:54:39 -07:00
lut_map.v
Makefile.inc Merge remote-tracking branch 'origin/master' into xaig_dff 2019-07-10 16:05:41 -07:00
mux_map.v
synth_xilinx.cc Move ABC FF stuff to abc_ff.v; add support for other FD* types 2019-07-10 17:06:05 -07:00