mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-11-11 16:42:05 +00:00
Code Activity
yosys/passes
History
mszelwiga 8e508f2a2a Fix setting bits of parameters in setundef pass 
This commit also adds test that verifies correctness of this change.
2024-11-08 17:03:08 +01:00
..
cmds Fix setting bits of parameters in setundef pass 2024-11-08 17:03:08 +01:00
equiv equiv_simple: Take FFs into account for driver map 2024-02-21 12:05:52 +01:00
fsm rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
hierarchy rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
memory rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
opt rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
pmgen rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
proc rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
sat rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
techmap bufnorm: preserve constant bits driving wires 2024-11-07 11:48:48 +01:00
tests rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00