Muthu Annamalai 721bd82d6f yosys> read_verilog /tmp/powerlog/cloud/Powerlog_43077FB1-54B7-4948-9CE7-C8A2DBD19124.tar.gz ... Found gzip magic in file /tmp/powerlog/cloud/Powerlog_43077FB1-54B7-4948-9CE7-C8A2DBD19124.tar.gz, decompressing using zlib. 1. Executing Verilog-2005 frontend: /tmp/powerlog/cloud/Powerlog_43077FB1-54B7-4948-9CE7-C8A2DBD19124.tar.gz Parsing Verilog input from `/tmp/powerlog/cloud/Powerlog_43077FB1-54B7-4948-9CE7-C8A2DBD19124.tar.gz' to AST representation. /tmp/powerlog/cloud/Powerlog_43077FB1-54B7-4948-9CE7-C8A2DBD19124.tar.gz:1: ERROR: syntax error, unexpected TOK_ID Obtained 13 stack frames. 1 | 0 yosys 0x00000001001644ac _Z17yosys_print_tracev + 88 2 | 1 yosys 0x0000000100164568 _Z12yosys_atexitv + 16 3 | 2 yosys 0x0000000100205124 _ZN5YosysL22logv_error_with_prefixEPKcS1_Pc + 840 4 | 3 yosys 0x00000001002052f4 _ZN5Yosys14log_file_errorERKNSt3__112basic_stringIcNS0_11char_traitsIcEENS0_9allocatorIcEEEEiPKcz + 96 5 | 4 yosys 0x00000001003bc694 _ZNSt3__110__list_impINS_6vectorINS_12basic_stringIcNS_11char_traitsIcEENS_9allocatorIcEEEENS5_IS7_EEEENS5_IS9_EEE5clearEv + 0 6 | 5 yosys 0x000000010039772c _Z24frontend_verilog_yyparsev + 2164 7 | 6 yosys 0x00000001003be520 _ZN5Yosys15VerilogFrontend7executeERPNSt3__113basic_istreamIcNS1_11char_traitsIcEEEENS1_12basic_stringIcS4_NS1_9allocatorIcEEEENS1_6vectorISB_NS9_ISB_EEEEPNS_5RTLIL6DesignE + 5556 8 | 7 yosys 0x0000000100171c60 _ZN5Yosys8Frontend7executeENSt3__16vectorINS1_12basic_stringIcNS1_11char_traitsIcEENS1_9allocatorIcEEEENS6_IS8_EEEEPNS_5RTLIL6DesignE + 172 9 | 8 yosys 0x00000001001709a4 _ZN5Yosys4Pass4callEPNS_5RTLIL6DesignENSt3__16vectorINS4_12basic_stringIcNS4_11char_traitsIcEENS4_9allocatorIcEEEENS9_ISB_EEEE + 532 10 | 9 yosys 0x0000000100170464 _ZN5Yosys4Pass4callEPNS_5RTLIL6DesignENSt3__112basic_stringIcNS4_11char_traitsIcEENS4_9allocatorIcEEEE + 1080 11 | 10 yosys 0x000000010021479c _ZN5Yosys5shellEPNS_5RTLIL6DesignE + 320 12 | 11 yosys 0x0000000100165374 main + 3444 13 | 12 dyld 0x00000001016710f4 start + 520		2023-05-13 00:49:05 -07:00
..
binding.cc	Generate an RTLIL representation of bind constructs	2021-08-13 17:11:35 -06:00
binding.h	Generate an RTLIL representation of bind constructs	2021-08-13 17:11:35 -06:00
bitpattern.h	Fixing old e-mail addresses and deadnames	2021-06-08 00:39:36 +02:00
calc.cc	Add bitwise $bweqx and $bwmux cells	2022-11-30 18:24:35 +01:00
cellaigs.cc	Fixing old e-mail addresses and deadnames	2021-06-08 00:39:36 +02:00
cellaigs.h	Fixing old e-mail addresses and deadnames	2021-06-08 00:39:36 +02:00
celledges.cc	Add $bmux and $demux cells.	2022-01-28 23:34:41 +01:00
celledges.h	Fixing old e-mail addresses and deadnames	2021-06-08 00:39:36 +02:00
celltypes.h	Add bitwise $bweqx and $bwmux cells	2022-11-30 18:24:35 +01:00
consteval.h	Remove set but unused variable	2022-05-27 12:37:03 +02:00
constids.inc	xprop, setundef: Mark xprop decoding bwmuxes, exclude them from setundef	2023-01-11 18:07:16 +01:00
cost.h	Fixing old e-mail addresses and deadnames	2021-06-08 00:39:36 +02:00
driver.cc	yosys> read_verilog /tmp/powerlog/cloud/Powerlog_43077FB1-54B7-4948-9CE7-C8A2DBD19124.tar.gz	2023-05-13 00:49:05 -07:00
ff.cc	Add the $anyinit cell and the formalff pass	2022-08-16 13:37:30 +02:00
ff.h	Add the $anyinit cell and the formalff pass	2022-08-16 13:37:30 +02:00
ffinit.h	Add new helper class for merging FFs into cells, use for memory_dff.	2021-05-23 14:46:59 +02:00
ffmerge.cc	Fix a regression from #3035.	2021-10-08 15:44:07 +02:00
ffmerge.h	Add new helper class for merging FFs into cells, use for memory_dff.	2021-05-23 14:46:59 +02:00
fstdata.cc	Fixes for some of clang scan-build detected issues	2023-01-17 12:58:08 +01:00
fstdata.h	Start restoring memory state from VCD/FST	2022-05-04 10:41:04 +02:00
hashlib.h	kernel: hashlib: cleaned up message about table size in cases where sizeof(int) == 4, (closes #3440)	2022-08-25 11:08:51 -04:00
json.cc	Support for BTOR witness to Yosys witness conversion	2023-01-11 18:07:16 +01:00
json.h	Support for BTOR witness to Yosys witness conversion	2023-01-11 18:07:16 +01:00
log.cc	[YOSYS][Issue 3594] Print backtrace on abort/assert #3594	2023-05-09 05:30:20 +00:00
log.h	[Backtrace] enable compile flag to trigger on at-exit; 6 frame minimum shows clean atexit when there is not much of a stack	2023-05-10 17:54:36 +00:00
macc.h	Fixing old e-mail addresses and deadnames	2021-06-08 00:39:36 +02:00
mem.cc	Add missing memory width assert preventing division by zero (#3546)	2022-11-09 10:34:25 +01:00
mem.h	Add proc_rom pass.	2022-05-13 00:37:14 +02:00
modtools.h	remove template declaration that stops function from being used	2023-01-11 16:09:05 +01:00
qcsat.cc	Add $bmux and $demux cells.	2022-01-28 23:34:41 +01:00
qcsat.h	Refactor common parts of SAT-using optimizations into a helper.	2021-08-09 16:54:35 +02:00
register.cc	Fixes for some of clang scan-build detected issues	2023-01-17 12:58:08 +01:00
register.h	Fixing old e-mail addresses and deadnames	2021-06-08 00:39:36 +02:00
rtlil.cc	backends/rtlil: Do not shorten a value with z bits to 'x	2023-01-29 14:02:25 +01:00
rtlil.h	backends/rtlil: Do not shorten a value with z bits to 'x	2023-01-29 14:02:25 +01:00
satgen.cc	Add bitwise $bweqx and $bwmux cells	2022-11-30 18:24:35 +01:00
satgen.h	sat: Add -set-def-formal option to force defined $any* outputs	2022-11-28 14:50:52 +01:00
sigtools.h	Fixing old e-mail addresses and deadnames	2021-06-08 00:39:36 +02:00
timinginfo.h	sta: very crude static timing analysis pass	2021-11-25 17:20:27 +01:00
utils.h	Fixing old e-mail addresses and deadnames	2021-06-08 00:39:36 +02:00
yosys.cc	[YOSYS][Issue 3594] Print backtrace on abort/assert #3594	2023-05-09 05:30:20 +00:00
yosys.h	Fix tcl crash in case of error executing command	2022-11-30 15:54:31 +01:00
yw.cc	Remove a statement without effect.	2023-04-17 10:53:05 -07:00
yw.h	sim/formalff: Clock handling for yw cosim	2023-01-11 18:07:16 +01:00