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13 lines
181 B
Verilog
13 lines
181 B
Verilog
module test(x, y, z);
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localparam OFF = 0;
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generate
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if (OFF) ;
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else input x;
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if (!OFF) input y;
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else ;
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if (OFF) ;
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else ;
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if (OFF) ;
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input z;
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endgenerate
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endmodule
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