Eddie Hung 8c5f379435 abc9: uniquify blackboxes like whiteboxes (#2695) ... * abc9_ops: uniquify blackboxes too * abc9_ops: update comment * abc9_ops: allow bypass for param-less blackboxes * Add tests		2021-03-29 22:02:06 -07:00
..
aiger	switch argument order to work with macOS getopt	2020-09-23 12:48:26 +02:00
arch	quicklogic: Add .gitignore file for test outputs.	2021-03-23 17:35:00 +01:00
asicworld
bram	tests/bram: Do not generate write address collisions.	2021-03-08 16:53:03 +01:00
errors	Rename the generic "Syntax error" message from the Verilog/SystemVerilog parser into unique,	2018-10-25 02:37:56 +03:00
fsm
hana
liberty
lut
memfile	Added 'set -e' into tests/memfile/run-test.sh	2020-02-06 10:45:40 -03:00
memories
opt	opt_clean: Remove init attribute bits together with removed DFFs.	2021-03-15 17:16:53 +01:00
opt_share	tests: Parallelize	2020-09-21 15:07:02 +02:00
proc	proc_arst: Add special-casing of clock signal in conditionals.	2021-03-15 17:17:29 +01:00
realmath
rpc
sat	assertpmux: Fix crash on unused $pmux output.	2021-02-22 23:30:28 +01:00
select
share
simple	verilog: fix buf/not primitives with multiple outputs	2021-03-17 11:44:03 -04:00
simple_abc9	abc9: fix SCC issues (#2694)	2021-03-29 22:01:57 -07:00
smv
sva
svinterfaces
svtypes	verilog: check entire user type stack for type definition	2021-03-21 19:35:13 -04:00
techmap	Add tests for some common techmap files.	2021-02-24 01:07:34 +01:00
tools	memory_dff: Remove now-useless write port handling.	2021-03-08 20:16:29 +01:00
unit
various	abc9: uniquify blackboxes like whiteboxes (#2695)	2021-03-29 22:02:06 -07:00
verilog	sv: allow typenames as function return types	2021-03-19 12:08:43 -04:00
vloghtb
gen-tests-makefile.sh