Miodrag Milanovic 8badd4d812 better handling of lut and begin/end add		2019-09-18 17:45:07 +02:00
..
achronix
anlogic	Added simulation models for Efinix and Anlogic	2019-09-15 09:37:16 +02:00
common	Use a dummy box file if none specified	2019-08-28 20:58:55 -07:00
coolrunner2	Fix spacing	2019-08-06 16:47:55 -07:00
easic
ecp5	Rename box	2019-09-02 12:15:11 -07:00
efinix	better handling of lut and begin/end add	2019-09-18 17:45:07 +02:00
gowin
greenpak4
ice40	Merge remote-tracking branch 'origin/master' into xaig_arrival	2019-08-30 10:30:46 -07:00
intel
sf2
xilinx	synth_xilinx: Support init values on Spartan 6 flip-flops properly.	2019-09-07 16:30:43 +02:00
.gitignore