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yosys/frontends
clairexen 0a14e1e837
Merge pull request #2029 from whitequark/fix-simplify-memory-sv_logic
ast/simplify: don't bitblast async ROMs declared as `logic`
2020-05-29 16:52:11 +02:00
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aiger aiger: -xaiger to return $_FF_ flops 2020-05-14 10:33:56 -07:00
ast Merge pull request #2029 from whitequark/fix-simplify-memory-sv_logic 2020-05-29 16:52:11 +02:00
blif kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
ilang ilang_lexer: fix check for out of range literal. 2020-05-29 06:58:44 +00:00
json Update JSON front-end to process new attr/param encoding 2019-08-01 12:48:22 +02:00
liberty kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
rpc Add WASI platform support. 2020-04-30 18:56:25 +00:00
verific Revert "Add support for non-power-of-two mem chunks in verific importer" 2020-05-17 11:31:11 +02:00
verilog Merge pull request #2033 from boqwxp/cleanup-verilog-lexer 2020-05-29 06:46:33 +00:00