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yosys/tests
2024-08-21 14:28:42 +01:00
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aiger read_aiger: Fix incorrect read of binary Aiger without outputs 2024-04-29 14:06:58 +01:00
arch inline all tests. Add switch to remove init values as PolarFire DFFs do not support init 2024-07-08 17:03:03 -04:00
asicworld
bind
blif
bram
cxxrtl cxxxrtl: fix use of format specifiers in test 2024-06-11 07:22:39 +01:00
errors
fmt cxxrtl: always lazily format print messages. 2024-01-19 18:55:23 +00:00
fsm
hana
liberty Extend liberty tests 2024-08-13 18:47:36 +02:00
lut
memfile
memlib Move parameters to module declaration 2024-04-08 12:44:37 +02:00
memories Move parameters to module declaration 2024-04-08 12:44:37 +02:00
opt peepopt: avoid shift-amount underflow 2024-06-13 23:30:07 +02:00
opt_share
proc proc_rom: test src attribute on memories 2024-07-29 10:13:45 +02:00
realmath
rpc
sat Add support for $dimensions and $unpacked_dimensions 2024-02-11 11:26:52 -05:00
select
share
sim
simple write_verilog: don't assign to a reg. 2024-04-03 13:06:45 +02:00
simple_abc9
smv
sva tests/sva: Skip sva tests that use SBY until SBY is compatible again 2024-03-05 14:37:33 +01:00
svinterfaces
svtypes fix test for verific 2024-02-12 09:19:58 +01:00
techmap cellmatch: Rename the special design to $cellmatch 2024-05-03 16:42:41 +02:00
tools
unit Changes in libs, passes and tests Makefiles. LDLIBS -> LIBS. LDFLAGS -> LINKFLAGS. CXX is clang++ or g++, not clang and gcc 2024-02-25 17:23:56 +01:00
various Ensure signed constants are correctly parsed, represented, and exported in RTLIL. Add a test to check parsing and exporting 2024-08-21 14:28:42 +01:00
verific Add -nordff to test 2024-02-06 10:36:30 +01:00
verilog write_verilog: don't assign to a reg. 2024-04-03 13:06:45 +02:00
vloghtb tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
xprop tests: Comment on A[0] 2024-02-16 11:43:28 +01:00
gen-tests-makefile.sh do not override existing shell variable 2024-02-12 12:58:13 +01:00