Advay Singh 8974f3473f Update passes/silimate/infer_ce.cc ... Co-authored-by: greptile-apps[bot] <165735046+greptile-apps[bot]@users.noreply.github.com>		2026-02-27 12:37:49 -08:00
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cmds	Merge from main	2026-02-13 04:14:08 -08:00
equiv	Bump to latest	2025-09-21 01:10:04 -07:00
fsm	fsm_detect: add adff detection	2025-11-06 23:29:47 +02:00
hierarchy	Merge remote-tracking branch 'upstream/main'	2025-11-07 01:42:20 -08:00
memory	Fix cell naming issues	2026-02-13 01:05:51 -08:00
opt	Improve wreduce runtime	2026-02-19 01:03:26 -08:00
pmgen	More minor cleanup	2025-09-28 07:19:53 -07:00
proc	proc_clean: Removing an empty full_case is doing something	2026-01-07 13:10:32 +13:00
sat	Added built in cell alongside sim support for cell	2026-02-19 11:48:35 -08:00
silimate	Update passes/silimate/infer_ce.cc	2026-02-27 12:37:49 -08:00
techmap	Checked out main passes/techmap/clockgate.cc for source attributes and removed logging	2026-02-27 12:24:31 -08:00
tests	test_cell.cc: Generate .aag for all compatible cells	2025-12-02 14:03:36 +13:00