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yosys/backends/verilog
History
Clifford Wolf 846eb5ea98 Add $specify2/$specify3 support to write_verilog 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-23 21:36:59 +02:00
..
Makefile.inc initial import 2013-01-05 11:13:26 +01:00
verilog_backend.cc Add $specify2/$specify3 support to write_verilog 2019-04-23 21:36:59 +02:00