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yosys/tests/arch
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Pepijn de Vos 83fbfe0964 Add some tests 
Copied from Efinix.

* fsm is broken
* latch and tribuf are not implemented yet
* memory maps to dram
2019-10-21 16:25:15 +02:00
..
anlogic Common memory test now shared 2019-10-18 12:33:35 +02:00
common fixed error 2019-10-18 13:15:36 +02:00
ecp5 Common memory test now shared 2019-10-18 12:33:35 +02:00
efinix Common memory test now shared 2019-10-18 12:33:35 +02:00
gowin Add some tests 2019-10-21 16:25:15 +02:00
ice40 Common memory test now shared 2019-10-18 12:33:35 +02:00
xilinx Common memory test now shared 2019-10-18 12:33:35 +02:00
run-test.sh Add simcells.v, simlib.v, and some output 2019-06-27 11:13:49 -07:00