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yosys/techlibs/intel
History
Emil J. Tywoniak 1b19859e84 intel: register bram celltypes
2026-07-17 23:33:02 +02:00
..
common End of file fix 2026-06-23 07:23:41 +02:00
cyclone10lp End of file fix 2026-06-23 07:23:41 +02:00
cycloneiv End of file fix 2026-06-23 07:23:41 +02:00
cycloneive End of file fix 2026-06-23 07:23:41 +02:00
max10 End of file fix 2026-06-23 07:23:41 +02:00
CMakeLists.txt synth_intel: fix broken dsp mapping 2026-06-22 17:51:26 +02:00
synth_intel.cc intel: register bram celltypes 2026-07-17 23:33:02 +02:00