David Shah 83b2e02723 Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp		2019-08-08 11:40:09 +01:00
..
achronix	Reduce amount of trailing whitespace in code base	2019-02-28 14:58:11 -08:00
anlogic	anlogic : Fix alu mapping	2019-08-03 14:47:33 +02:00
common	Merge remote-tracking branch 'origin/master' into xc7dsp	2019-08-07 13:44:08 -07:00
coolrunner2	Unify usage of noflatten among architectures	2019-01-04 11:37:25 +01:00
easic	Revert "synth_* with -retime option now calls abc with -D 1 as well"	2019-04-18 07:59:16 -07:00
ecp5	Merge remote-tracking branch 'origin/master' into xc7dsp	2019-08-07 13:44:08 -07:00
gowin	Fix formatting for msys2 mingw build using GetSize	2019-08-01 17:27:34 +02:00
greenpak4	techlibs/greenpak4/cells_map.v: Harmonize whitespace within lut module	2019-02-26 09:40:46 -08:00
ice40	Run "opt_expr -fine" instead of "wreduce" due to #1213	2019-08-07 13:59:07 -07:00
intel	Merge branch 'ZirconiumX-synth_intel_m9k'	2019-07-25 17:23:48 +02:00
sf2	Add link to SF2 / igloo2 macro library guide	2019-03-07 09:08:26 -08:00
xilinx	DSP48E1 sim model: add SIMD tests	2019-08-08 11:39:35 +01:00
.gitignore	added .gitignore files	2013-01-05 11:19:11 +01:00