yosys/techlibs/anlogic/drams.txt at 837cb0a1b9c9a774512481d0812c28f927985e7b - mirrors/yosys - Libre-Chip.org

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Icenowy Zheng 90d00182cf anlogic: implement DRAM initialization

As the TD tool doesn't accept the DRAM cell to contain unknown values in
the initial value, the initialzation support of DRAM is previously
skipped.

Now add the support by add a new pass to determine unknown values in the
initial value.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>

2018-12-20 07:56:15 +08:00

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 bram $__ANLOGIC_DRAM16X4
   init 1
   abits 4
   dbits 4
   groups 2
   ports  1 1
   wrmode 0 1
   enable 0 1
   transp 0 0
   clocks 0 1
   clkpol 0 1
 endbram
 match $__ANLOGIC_DRAM16X4
   make_outreg
 endmatch