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s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi; s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi; s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi; s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi; s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
94 lines
3.1 KiB
C++
94 lines
3.1 KiB
C++
/*
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* yosys -- Yosys Open SYnthesis Suite
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*
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* Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include "kernel/yosys.h"
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USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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struct EquivStatusPass : public Pass {
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EquivStatusPass() : Pass("equiv_status", "print status of equivalent checking module") { }
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void help() override
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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log(" equiv_status [options] [selection]\n");
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log("\n");
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log("This command prints status information for all selected $equiv cells.\n");
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log("\n");
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log(" -assert\n");
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log(" produce an error if any unproven $equiv cell is found\n");
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log("\n");
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}
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void execute(std::vector<std::string> args, Design *design) override
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{
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bool assert_mode = false;
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int unproven_count = 0;
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log_header(design, "Executing EQUIV_STATUS pass.\n");
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size_t argidx;
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for (argidx = 1; argidx < args.size(); argidx++) {
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if (args[argidx] == "-assert") {
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assert_mode = true;
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continue;
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}
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break;
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}
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extra_args(args, argidx, design);
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for (auto module : design->selected_modules())
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{
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vector<Cell*> unproven_equiv_cells;
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int proven_equiv_cells = 0;
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for (auto cell : module->selected_cells())
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if (cell->type == ID($equiv)) {
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if (cell->getPort(ID::A) != cell->getPort(ID::B))
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unproven_equiv_cells.push_back(cell);
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else
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proven_equiv_cells++;
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}
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if (unproven_equiv_cells.empty() && !proven_equiv_cells) {
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log("No $equiv cells found in %s.\n", log_id(module));
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continue;
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}
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log("Found %d $equiv cells in %s:\n", GetSize(unproven_equiv_cells) + proven_equiv_cells, log_id(module));
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log(" Of those cells %d are proven and %d are unproven.\n", proven_equiv_cells, GetSize(unproven_equiv_cells));
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if (unproven_equiv_cells.empty()) {
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log(" Equivalence successfully proven!\n");
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} else {
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for (auto cell : unproven_equiv_cells)
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log(" Unproven $equiv %s: %s %s\n", log_id(cell), log_signal(cell->getPort(ID::A)), log_signal(cell->getPort(ID::B)));
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}
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unproven_count += GetSize(unproven_equiv_cells);
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}
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if (unproven_count != 0) {
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log("Found a total of %d unproven $equiv cells.\n", unproven_count);
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if (assert_mode && unproven_count != 0)
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log_error("Found %d unproven $equiv cells in 'equiv_status -assert'.\n", unproven_count);
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}
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}
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} EquivStatusPass;
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PRIVATE_NAMESPACE_END
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