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23 lines
242 B
Verilog
23 lines
242 B
Verilog
module tristate (en, i, o);
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input en;
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input i;
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output o;
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assign o = en ? i : 1'bz;
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endmodule
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module top (
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input en,
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input a,
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output b
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);
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tristate u_tri (
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.en (en ),
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.i (a ),
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.o (b )
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);
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endmodule
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