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67 lines
2.2 KiB
ReStructuredText
67 lines
2.2 KiB
ReStructuredText
Converting process blocks
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~~~~~~~~~~~~~~~~~~~~~~~~~
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.. role:: yoscrypt(code)
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:language: yoscrypt
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The Verilog frontend converts ``always``-blocks to RTL netlists for the
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expressions and "processess" for the control- and memory elements. The `proc`
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command then transforms these "processess" to netlists of RTL multiplexer and
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register cells. It also is a macro command that calls the other ``proc_*``
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commands in a sensible order:
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.. literalinclude:: /code_examples/macro_commands/proc.ys
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:language: yoscrypt
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:start-after: #end:
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:caption: Passes called by `proc`
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After all the ``proc_*`` commands, `opt_expr` is called. This can be disabled by
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calling :yoscrypt:`proc -noopt`. For more information about `proc`, such as
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disabling certain sub commands, see :doc:`/cmd/index_passes_proc`.
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Many commands can not operate on modules with "processess" in them. Usually a
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call to `proc` is the first command in the actual synthesis procedure after
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design elaboration.
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Example
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^^^^^^^
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.. todo:: describe ``proc`` images
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|code_examples/synth_flow|_.
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.. |code_examples/synth_flow| replace:: :file:`docs/source/code_examples/synth_flow`
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.. _code_examples/synth_flow: https://github.com/YosysHQ/yosys/tree/main/docs/source/code_examples/synth_flow
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.. literalinclude:: /code_examples/synth_flow/proc_01.v
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:language: verilog
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:caption: :file:`proc_01.v`
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.. literalinclude:: /code_examples/synth_flow/proc_01.ys
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:language: yoscrypt
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:caption: :file:`proc_01.ys`
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.. figure:: /_images/code_examples/synth_flow/proc_01.*
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:class: width-helper invert-helper
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.. figure:: /_images/code_examples/synth_flow/proc_02.*
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:class: width-helper invert-helper
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.. literalinclude:: /code_examples/synth_flow/proc_02.v
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:language: verilog
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:caption: :file:`proc_02.v`
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.. literalinclude:: /code_examples/synth_flow/proc_02.ys
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:language: yoscrypt
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:caption: :file:`proc_02.ys`
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.. figure:: /_images/code_examples/synth_flow/proc_03.*
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:class: width-helper invert-helper
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.. literalinclude:: /code_examples/synth_flow/proc_03.ys
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:language: yoscrypt
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:caption: :file:`proc_03.ys`
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.. literalinclude:: /code_examples/synth_flow/proc_03.v
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:language: verilog
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:caption: :file:`proc_03.v`
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