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yosys/techlibs
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Robert Ou 14e49fb057 coolrunner2: Add an ANDTERM/XOR between chained FFs 
In some cases (e.g. the low bits of counters) the design might end up
with a flip-flop whose input is directly driven by another flip-flop.
This isn't possible in the Coolrunner-II architecture, so add a single
AND term and XOR in this case.
2018-03-31 03:54:48 -07:00
..
achronix Squelch trailing whitespace, including meta-whitespace 2018-03-11 16:03:41 +01:00
common Add "synth -noshare" 2018-03-04 17:13:45 +01:00
coolrunner2 coolrunner2: Add an ANDTERM/XOR between chained FFs 2018-03-31 03:54:48 -07:00
easic Add first draft of eASIC back-end 2017-09-29 17:53:43 +02:00
gowin Indenting fixes in gowin sim cell lib 2016-11-08 18:54:00 +01:00
greenpak4 Added RESET_TO_MAX parameter to $__COUNT_ cell. Cannot yet be extracted. 2017-09-14 10:26:32 -07:00
ice40 Squelch trailing whitespace, including meta-whitespace 2018-03-11 16:03:41 +01:00
intel Add "dffinit -highlow" and fix synth_intel 2018-01-09 18:42:19 +01:00
xilinx Squelch trailing whitespace, including meta-whitespace 2018-03-11 16:03:41 +01:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00