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88 lines
3 KiB
Text
88 lines
3 KiB
Text
read_verilog -icells <<EOT
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module dffsr(input C, R, S, D, output [3:0] Q);
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$_DFFSR_PPP_ ff0 (.C(C), .R(R), .S(S), .D(D), .Q(Q[0]));
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$_DFFSR_PPN_ ff1 (.C(C), .R(R), .S(S), .D(D), .Q(Q[1]));
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$_DFFSR_PNP_ ff2 (.C(C), .R(R), .S(S), .D(D), .Q(Q[2]));
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$_DFFSR_NPP_ ff3 (.C(C), .R(R), .S(S), .D(D), .Q(Q[3]));
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endmodule
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module dffsre(input C, R, S, E, D, output [4:0] Q);
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$_DFFSRE_PPPP_ ff0 (.C(C), .R(R), .S(S), .E(E), .D(D), .Q(Q[0]));
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$_DFFSRE_PPPN_ ff1 (.C(C), .R(R), .S(S), .E(E), .D(D), .Q(Q[1]));
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$_DFFSRE_PPNP_ ff2 (.C(C), .R(R), .S(S), .E(E), .D(D), .Q(Q[2]));
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$_DFFSRE_PNPP_ ff3 (.C(C), .R(R), .S(S), .E(E), .D(D), .Q(Q[3]));
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$_DFFSRE_NPPP_ ff4 (.C(C), .R(R), .S(S), .E(E), .D(D), .Q(Q[4]));
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endmodule
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module top(input C, E, R, S, D, output [8:0] Q);
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dffsr dffsr_(.C(C), .R(R), .S(S), .D(D), .Q(Q[3:0]));
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dffsre dffsre_(.C(C), .R(R), .S(S), .E(E), .D(D), .Q(Q[8:4]));
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endmodule
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EOT
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design -save orig
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flatten
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#equiv_opt -assert -multiclock -map +/simcells.v dfflegalize -cell $_DFF_PP0_ x -cell $_SR_PP_ x
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#equiv_opt -assert -multiclock -map +/simcells.v dfflegalize -cell $_DFFE_PP0P_ x -cell $_SR_PP_ x
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equiv_opt -assert -multiclock -map +/simcells.v dfflegalize -cell $_DFFSR_PPP_ x
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equiv_opt -assert -multiclock -map +/simcells.v dfflegalize -cell $_DFFSRE_PPPP_ x
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# Convert everything to ADFFs.
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design -load orig
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dfflegalize -cell $_DFF_PP0_ x -cell $_SR_PP_ x
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select -assert-count 14 dffsr/t:$_NOT_
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select -assert-count 16 dffsre/t:$_NOT_
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select -assert-count 4 dffsr/t:$_MUX_
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select -assert-count 10 dffsre/t:$_MUX_
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select -assert-count 8 dffsr/t:$_DFF_PP0_
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select -assert-count 10 dffsre/t:$_DFF_PP0_
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select -assert-count 4 dffsr/t:$_SR_PP_
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select -assert-count 5 dffsre/t:$_SR_PP_
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select -assert-none t:$_DFF_PP0_ t:$_SR_PP_ t:$_MUX_ t:$_NOT_ top/* %% %n t:* %i
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# Convert everything to ADFFEs.
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design -load orig
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dfflegalize -cell $_DFFE_PP0P_ x -cell $_SR_PP_ x
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select -assert-count 14 dffsr/t:$_NOT_
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select -assert-count 18 dffsre/t:$_NOT_
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select -assert-count 4 dffsr/t:$_MUX_
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select -assert-count 5 dffsre/t:$_MUX_
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select -assert-count 8 dffsr/t:$_DFFE_PP0P_
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select -assert-count 10 dffsre/t:$_DFFE_PP0P_
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select -assert-count 4 dffsr/t:$_SR_PP_
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select -assert-count 5 dffsre/t:$_SR_PP_
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select -assert-none t:$_DFFE_PP0P_ t:$_SR_PP_ t:$_MUX_ t:$_NOT_ top/* %% %n t:* %i
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# Convert everything to DFFSRs.
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design -load orig
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dfflegalize -cell $_DFFSR_PPP_ x
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select -assert-count 3 dffsr/t:$_NOT_
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select -assert-count 3 dffsre/t:$_NOT_
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select -assert-count 0 dffsr/t:$_MUX_
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select -assert-count 5 dffsre/t:$_MUX_
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select -assert-count 4 dffsr/t:$_DFFSR_PPP_
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select -assert-count 5 dffsre/t:$_DFFSR_PPP_
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select -assert-none t:$_DFFSR_PPP_ t:$_MUX_ t:$_NOT_ top/* %% %n t:* %i
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# Convert everything to DFFSREs.
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design -load orig
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dfflegalize -cell $_DFFSRE_PPPP_ x
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select -assert-count 3 dffsr/t:$_NOT_
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select -assert-count 4 dffsre/t:$_NOT_
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select -assert-count 4 dffsr/t:$_DFFSRE_PPPP_
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select -assert-count 5 dffsre/t:$_DFFSRE_PPPP_
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select -assert-none t:$_DFFSRE_PPPP_ t:$_NOT_ top/* %% %n t:* %i
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