3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-11-09 07:45:08 +00:00
yosys/tests
2024-04-11 14:56:00 +02:00
..
aiger
arch Add workflows and CODEOWNERS and fixed gitignore 2024-04-11 14:56:00 +02:00
asicworld
bind
blif
bram
cxxrtl cxxrtl: Fix sdivmod 2024-03-30 07:56:11 +00:00
errors
fmt
fsm
hana
liberty
lut
memfile
memlib Move parameters to module declaration 2024-04-08 12:44:37 +02:00
memories Move parameters to module declaration 2024-04-08 12:44:37 +02:00
opt tests: Remove part of test involving combinational loops 2024-03-11 10:45:36 +01:00
opt_share
proc
realmath
rpc
sat
select tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
share
sim
simple write_verilog: don't assign to a reg. 2024-04-03 13:06:45 +02:00
simple_abc9
smv
sva tests/sva: Skip sva tests that use SBY until SBY is compatible again 2024-03-05 14:37:33 +01:00
svinterfaces
svtypes
techmap techmap: Add Kogge-Stone test 2024-03-27 11:08:26 +01:00
tools
unit Changes in libs, passes and tests Makefiles. LDLIBS -> LIBS. LDFLAGS -> LINKFLAGS. CXX is clang++ or g++, not clang and gcc 2024-02-25 17:23:56 +01:00
various celledges: Add read ports arst paths 2024-03-11 10:45:17 +01:00
verific
verilog write_verilog: don't assign to a reg. 2024-04-03 13:06:45 +02:00
vloghtb
xprop
gen-tests-makefile.sh