Emil J. Tywoniak 6240aec433 test: restore verific handling, nicer naming		2024-12-13 10:24:47 +01:00
..
.gitignore
alu.v
asserts.v
asserts.ys	tests: Run async2sync before sat and/or sim to handle $check cells	2024-02-01 16:14:11 +01:00
asserts_seq.v
asserts_seq.ys	tests: Run async2sync before sat and/or sim to handle $check cells	2024-02-01 16:14:11 +01:00
bug2595.ys	Remove references to ilang	2024-11-05 12:36:31 +13:00
clk2fflogic.ys
counters-repeat.v
counters-repeat.ys
counters.v
counters.ys
dff.ys
expose_dff.v
expose_dff.ys
grom.ys
grom_computer.v
grom_cpu.v	Proper example code	2022-03-14 15:39:11 +01:00
initval.v
initval.ys	tests: Run async2sync before sat and/or sim to handle $check cells	2024-02-01 16:14:11 +01:00
ram_memory.v	Proper example code	2022-03-14 15:39:11 +01:00
run-test.sh	test: restore verific handling, nicer naming	2024-12-13 10:24:47 +01:00
share.v
share.ys
sim_counter.ys
sizebits.sv	Add support for $dimensions and $unpacked_dimensions	2024-02-11 11:26:52 -05:00
sizebits.ys	tests: Run async2sync before sat and/or sim to handle $check cells	2024-02-01 16:14:11 +01:00
splice.v
splice.ys