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yosys/techlibs
2026-07-17 23:38:01 +02:00
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achronix End of file fix 2026-06-23 07:23:41 +02:00
analogdevices Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
anlogic Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
common Merge branch 'main' into nella/latch-toggle 2026-07-08 11:41:08 +02:00
coolrunner2 Migrate build system to CMake 2026-06-03 08:58:10 +00:00
easic Migrate build system to CMake 2026-06-03 08:58:10 +00:00
efinix Merge branch 'main' into nella/latch-toggle 2026-07-08 11:41:08 +02:00
fabulous Remove old techmap. 2026-07-08 12:07:58 +02:00
gatemate Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
gowin gowin: replace positional arguments in cells_sim.v with named 2026-07-17 23:33:02 +02:00
greenpak4 Migrate build system to CMake 2026-06-03 08:58:10 +00:00
ice40 pmgen: hold sigmap pointer instead of owning it 2026-07-17 23:38:01 +02:00
intel intel: register bram celltypes 2026-07-17 23:33:02 +02:00
intel_alm intel: register bram celltypes 2026-07-17 23:33:02 +02:00
lattice pmgen: hold sigmap pointer instead of owning it 2026-07-17 23:38:01 +02:00
microchip pmgen: hold sigmap pointer instead of owning it 2026-07-17 23:38:01 +02:00
nanoxplore Merge branch 'main' into nella/latch-toggle 2026-07-08 11:41:08 +02:00
quicklogic pmgen: hold sigmap pointer instead of owning it 2026-07-17 23:38:01 +02:00
sf2 Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
xilinx xilinx_dsp: signorm compatibility 2026-07-17 23:38:01 +02:00
CMakeLists.txt Migrate build system to CMake 2026-06-03 08:58:10 +00:00
fix_mod.py Remove trailing whitespaces 2026-06-23 07:24:59 +02:00