Jannis Harder 7203ba7bc1 Add bitwise $bweqx and $bwmux cells ... The new bitwise case equality (`$bweqx`) and bitwise mux (`$bwmux`) cells enable compact encoding and decoding of 3-valued logic signals using multiple 2-valued signals.		2022-11-30 18:24:35 +01:00
..
.gitignore
abc9_map.v
abc9_model.v
abc9_unmap.v
adff2dff.v
cellhelp.py
cells.lib
cmp2lcu.v
cmp2lut.v
dff2ff.v
gate2lut.v
gen_fine_ffs.py
Makefile.inc
mul2dsp.v
pmux2mux.v
prep.cc
simcells.v
simlib.v	Add bitwise $bweqx and $bwmux cells	2022-11-30 18:24:35 +01:00
smtmap.v
synth.cc
techmap.v	Add bitwise $bweqx and $bwmux cells	2022-11-30 18:24:35 +01:00