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yosys/tests/arch
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Marcin Kościelnicki 666c6128a9 xilinx_dsp: Initial DSP48A/DSP48A1 support.
2019-12-22 20:51:14 +01:00
..
anlogic Rename memory tests to lutram, add more xilinx tests 2019-12-12 17:44:37 -08:00
common Merge pull request #1574 from YosysHQ/eddie/xilinx_lutram 2019-12-16 21:48:21 -08:00
ecp5 Rename memory tests to lutram, add more xilinx tests 2019-12-12 17:44:37 -08:00
efinix Rename memory tests to lutram, add more xilinx tests 2019-12-12 17:44:37 -08:00
gowin Rename memory tests to lutram, add more xilinx tests 2019-12-12 17:44:37 -08:00
ice40 Rename memory tests to lutram, add more xilinx tests 2019-12-12 17:44:37 -08:00
xilinx xilinx_dsp: Initial DSP48A/DSP48A1 support. 2019-12-22 20:51:14 +01:00
run-test.sh Add simcells.v, simlib.v, and some output 2019-06-27 11:13:49 -07:00