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yosys/techlibs/greenpak4
2019-02-26 09:40:46 -08:00
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cells_blackbox.v
cells_latch.v
cells_map.v techlibs/greenpak4/cells_map.v: Harmonize whitespace within lut module 2019-02-26 09:40:46 -08:00
cells_sim.v
cells_sim_ams.v
cells_sim_digital.v
cells_sim_wip.v
gp_dff.lib
greenpak4_dffinv.cc Consistent use of 'override' for virtual methods in derived classes. 2018-07-20 23:51:06 -07:00
Makefile.inc
synth_greenpak4.cc Fix typographical and grammatical errors and inconsistencies. 2019-01-02 13:12:17 +00:00