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Code Activity
yosys/frontends/verilog
History
Emil J. Tywoniak 72ff18bab0 verilog_lexer: refactor
2025-08-08 15:36:43 +02:00
..
.gitignore read_verilog, ast: use unified locations in errors and simplify dependencies 2025-08-08 15:36:43 +02:00
const2ast.cc ast, read_verilog: unify location types, reduce filename copying 2025-08-08 15:36:43 +02:00
Makefile.inc verilog: fix build dependency graph 2025-08-08 15:36:43 +02:00
preproc.cc preproc: formatting 2025-08-08 15:36:43 +02:00
preproc.h preproc: formatting 2025-08-08 15:36:43 +02:00
verilog_error.cc read_verilog, ast: use unified locations in errors and simplify dependencies 2025-08-08 15:36:43 +02:00
verilog_error.h read_verilog, ast: use unified locations in errors and simplify dependencies 2025-08-08 15:36:43 +02:00
verilog_frontend.cc read_verilog, ast: use unified locations in errors and simplify dependencies 2025-08-08 15:36:43 +02:00
verilog_frontend.h fixup! fixup! ast, read_verilog: unify location types, reduce filename copying 2025-08-08 15:36:43 +02:00
verilog_lexer.h verilog_lexer: refactor 2025-08-08 15:36:43 +02:00
verilog_lexer.l verilog_lexer, verilog_parser: remove comment 2025-08-08 15:36:43 +02:00
verilog_location.h fixup! ast, read_verilog: unify location types, reduce filename copying 2025-08-08 15:36:43 +02:00
verilog_parser.y verilog_lexer, verilog_parser: remove comment 2025-08-08 15:36:43 +02:00