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yosys/techlibs/analogdevices
2026-03-06 09:10:36 +01:00
..
abc9_model.v analogdevices: fix MUXF78 name 2026-03-05 05:37:13 +00:00
arith_map.v
brams.txt analogdevices: Fixing up bram 2026-03-05 05:37:13 +00:00
brams_defs.vh
brams_map.v analogdevices: Fixing up bram 2026-03-05 05:37:13 +00:00
cells_map.v analogdevices: fix SHREG name 2026-03-05 05:37:13 +00:00
cells_sim.v analogdevices: update missed T40LP timings 2026-03-05 05:37:13 +00:00
dsp_map.v
ff_map.v
lut_map.v
lutrams.txt analogdevices: double LUT RAM cost 2026-03-05 05:37:13 +00:00
lutrams_map.v
Makefile.inc
mux_map.v analogdevices: fix SHIFTX name 2026-03-05 05:37:13 +00:00
retarget_map.v
synth_analogdevices.cc Update opt_lut_ins and stat for analogdevices and remove ecp5 2026-03-06 09:10:36 +01:00