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yosys/passes
Jannis Harder 13a2481da7
Merge pull request #5365 from rocallahan/deterministic-abc
Extract ABC results in the order of `assigned_cells`
2025-09-22 23:21:11 +02:00
..
cmds Merge pull request #5315 from YosysHQ/emil/write_rtlil-no-sort 2025-09-22 11:14:39 +02:00
equiv Merge pull request #5357 from rocallahan/builtin-ff 2025-09-17 11:37:16 +02:00
fsm Remove .c_str() calls from parameters to log_warning()/log_warning_noprefix() 2025-09-16 23:02:16 +00:00
hierarchy Remove .c_str() calls from parameters to log_warning()/log_warning_noprefix() 2025-09-16 23:02:16 +00:00
memory Remove .c_str() calls from parameters to log_warning()/log_warning_noprefix() 2025-09-16 23:02:16 +00:00
opt Clean up $buf with 'z inputs, $input_port and $connect cells 2025-09-17 13:56:46 +02:00
pmgen Remove .c_str() from log_cmd_error() and log_file_error() parameters 2025-09-16 22:59:08 +00:00
proc Update passes/proc to avoid bits() 2025-09-16 03:17:23 +00:00
sat Merge pull request #5357 from rocallahan/builtin-ff 2025-09-17 11:37:16 +02:00
techmap Merge pull request #5365 from rocallahan/deterministic-abc 2025-09-22 23:21:11 +02:00
tests Merge pull request #5315 from YosysHQ/emil/write_rtlil-no-sort 2025-09-22 11:14:39 +02:00