This website requires JavaScript.
Explore
Help
Register
Sign in
mirrors
/
yosys
Watch
3
Star
0
Fork
You've already forked yosys
0
mirror of
https://github.com/YosysHQ/yosys
synced
2025-10-30 03:02:30 +00:00
Code
Activity
6edf9c86cb
yosys
/
passes
History
Emil J. Tywoniak
6edf9c86cb
libparse: add LibertyMergedCells, enable multiple -liberty args for dfflibmap and clockgate
2024-12-03 17:36:00 +01:00
..
cmds
portarcs: New command to derive propagation arcs
2024-11-13 16:20:35 +01:00
equiv
equiv_simple: Take FFs into account for driver map
2024-02-21 12:05:52 +01:00
fsm
rtlil: represent Const strings as std::string
2024-10-14 06:28:12 +02:00
hierarchy
Merge pull request
#4706
from povik/keep_hierarchy-adjustalgo
2024-12-03 12:18:28 +01:00
memory
rtlil: represent Const strings as std::string
2024-10-14 06:28:12 +02:00
opt
Merge pull request
#4612
from georgerennie/george/opt_demorgan_zero_width
2024-11-20 13:33:16 +01:00
pmgen
Merge pull request
#4448
from georgerennie/shiftadd_gating
2024-11-20 13:34:09 +01:00
proc
proc_dff: fix early return bug
2024-11-07 00:06:03 +01:00
sat
Merge pull request
#4525
from georgerennie/peepopt_clock_gate
2024-11-11 14:49:09 +01:00
techmap
libparse: add LibertyMergedCells, enable multiple -liberty args for dfflibmap and clockgate
2024-12-03 17:36:00 +01:00
tests
rtlil: represent Const strings as std::string
2024-10-14 06:28:12 +02:00