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17 lines
452 B
Systemverilog
17 lines
452 B
Systemverilog
// Minimal variable-part-select (VPS) read: extracts a 32-bit word
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// from a 256-bit register at a dynamic byte offset.
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module opt_vps_read (
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input logic clk,
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input logic wr_en,
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input logic [7:0] index,
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input logic [255:0] wdata,
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output logic [31:0] q
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);
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logic [255:0] reg_data;
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always_ff @(posedge clk)
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if (wr_en)
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reg_data <= wdata;
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assign q = reg_data[index +: 32];
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endmodule
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