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yosys/backends/cxxrtl
whitequark 6cf02ed94f cxxrtl: fix rzext().
This was a correctness issue, but one of the consequences is that it
resulted in jumps in generated machine code where there should have
been none. As a side effect of fixing the bug, Minerva SoC became 10%
faster.
2020-06-13 00:49:44 +00:00
..
cxxrtl.h cxxrtl: fix rzext(). 2020-06-13 00:49:44 +00:00
cxxrtl_backend.cc cxxrtl: elide $pmux cells. 2020-06-12 02:40:30 +00:00
cxxrtl_capi.cc cxxrtl: add a C API for writing VCD dumps. 2020-06-07 03:48:00 +00:00
cxxrtl_capi.h cxxrtl: disambiguate values/wires and their aliases in debug info. 2020-06-10 14:39:45 +00:00
cxxrtl_vcd.h cxxrtl: disambiguate values/wires and their aliases in debug info. 2020-06-10 14:39:45 +00:00
cxxrtl_vcd_capi.cc cxxrtl: add missing namespace. 2020-06-09 06:26:43 +00:00
cxxrtl_vcd_capi.h Fix formatting. NFC. 2020-06-10 15:48:40 +00:00
Makefile.inc cxxrtl: rename cxxrtl.cc→cxxrtl_backend.cc. 2020-06-07 03:48:40 +00:00