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Code Activity
yosys/frontends
History
Zachary Snow 6b7267b849 verilog: fix multiple AST_PREFIX scope resolution issues 
- Root AST_PREFIX nodes are now subject to genblk expansion to allow
  them to refer to a locally-visible generate block
- Part selects on AST_PREFIX member leafs can now refer to generate
  block items (previously would not resolve and raise an error)
- Add source location information to AST_PREFIX nodes
2021-09-21 12:10:59 -04:00
..
aiger Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
ast verilog: fix multiple AST_PREFIX scope resolution issues 2021-09-21 12:10:59 -04:00
blif Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
json Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
liberty Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
rpc Fix argument handling in connect_rpc 2020-10-19 13:40:57 +02:00
rtlil rtlil: Make Process handling more uniform with Cell and Wire. 2021-07-12 00:47:34 +02:00
verific update required verific version 2021-09-02 14:59:16 +02:00
verilog verilog: fix multiple AST_PREFIX scope resolution issues 2021-09-21 12:10:59 -04:00