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yosys/passes
Martin Povišer 6b5fbe37f0 sim: Evaluate all cells once
If a cell starts with undefined inputs and the value of those inputs is
never changed, `sim` code will never evaluate that cell. This means its
output will be left at undefined, but in some edge cases such cell can
evaluate to a defined value. To address those cases evaluate all cells
at least once.
2024-01-15 12:02:24 +01:00
..
cmds Merge pull request #3946 from rmlarsen/toposort 2023-10-17 13:00:18 +01:00
equiv Merge pull request #3126 from georgerennie/equiv_make_assertions 2023-02-14 17:15:55 +01:00
fsm add option to fsm_detect to ignore self-resetting 2023-01-30 16:12:53 +01:00
hierarchy Small bugfix in uniquify pass 2022-12-21 10:41:48 +01:00
memory memory_libmap: update search order for attributes 2023-10-24 13:55:45 +02:00
opt Merge pull request #3946 from rmlarsen/toposort 2023-10-17 13:00:18 +01:00
pmgen peepopt: Add assert of consistent shiftadd data 2023-11-06 16:35:00 +01:00
proc proc_clean: only consider fully-defined switch operands too. 2023-08-12 02:46:31 +02:00
sat sim: Evaluate all cells once 2024-01-15 12:02:24 +01:00
techmap Merge pull request #3946 from rmlarsen/toposort 2023-10-17 13:00:18 +01:00
tests Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00