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10 lines
161 B
Verilog
10 lines
161 B
Verilog
module add_multi_fanout(
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input [7:0] a, b, c,
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output [7:0] mid,
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output [7:0] y
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);
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wire [7:0] ab = a + b;
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assign mid = ab;
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assign y = ab + c;
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endmodule
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