Emil J. Tywoniak f2263642a4 xilinx: fix IdString memory leak		2025-11-13 14:10:52 +01:00
..
tests
abc9_model.v
arith_map.v
brams_defs.vh
brams_xc2v.txt	xilinx: Use memory_libmap pass.	2022-05-18 17:32:56 +02:00
brams_xc2v_map.v
brams_xc3sda.txt	xilinx: Use memory_libmap pass.	2022-05-18 17:32:56 +02:00
brams_xc3sda_map.v
brams_xc4v.txt	xilinx: Use memory_libmap pass.	2022-05-18 17:32:56 +02:00
brams_xc4v_map.v
brams_xc5v_map.v
brams_xc6v_map.v
brams_xcu_map.v
brams_xcv.txt
brams_xcv_map.v
cells_map.v
cells_sim.v
cells_xtra.py
cells_xtra.v	Update Xilinx cell definitions, fixes #3699	2023-03-23 09:44:36 +01:00
ff_map.v
lut_map.v
lutrams_xc5v.txt	xilinx: Use memory_libmap pass.	2022-05-18 17:32:56 +02:00
lutrams_xc5v_map.v
lutrams_xcu.txt
lutrams_xcv.txt	xilinx: Use memory_libmap pass.	2022-05-18 17:32:56 +02:00
lutrams_xcv_map.v
Makefile.inc
mux_map.v
synth_xilinx.cc
urams.txt	URAM mapping : Add test for 2048 x 144b	2025-05-10 14:53:56 +02:00
urams_map.v
xc3s_mult_map.v
xc3sda_dsp_map.v
xc4v_dsp_map.v
xc5v_dsp_map.v
xc6s_dsp_map.v	xilinx_dsp: Initial DSP48A/DSP48A1 support.	2019-12-22 20:51:14 +01:00
xc7_dsp_map.v
xcu_dsp_map.v
xilinx_dffopt.cc
xilinx_dsp.cc
xilinx_dsp.pmg
xilinx_dsp48a.pmg
xilinx_dsp_cascade.pmg	xilinx: fix IdString memory leak	2025-11-13 14:10:52 +01:00
xilinx_dsp_CREG.pmg
xilinx_srl.cc
xilinx_srl.pmg