mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-07 18:05:24 +00:00
Code Activity
yosys/backends/cxxrtl
History
whitequark 68362a9053 cxxrtl: only write VCD values that were actually updated. 
On a representative design (Minerva SoC) this reduces VCD file size
by ~20× and runtime by ~3×.
2020-06-07 03:48:00 +00:00
..
cxxrtl.cc cxxrtl: add a C API for driving and introspecting designs. 2020-06-06 21:12:55 +00:00
cxxrtl.h cxxrtl: add a C API for driving and introspecting designs. 2020-06-06 21:12:55 +00:00
cxxrtl_capi.cc cxxrtl: add a C API for driving and introspecting designs. 2020-06-06 21:12:55 +00:00
cxxrtl_capi.h cxxrtl: add a C API for driving and introspecting designs. 2020-06-06 21:12:55 +00:00
cxxrtl_vcd.h cxxrtl: only write VCD values that were actually updated. 2020-06-07 03:48:00 +00:00
Makefile.inc write_cxxrtl: new backend. 2020-04-09 04:08:36 +00:00