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https://github.com/YosysHQ/yosys
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b74d33d1b8
The behavior of these format specifiers is highly specific to Verilog (`$time` and `$realtime` are only defined relative to `$timescale`) and may not fit other languages well, if at all. If they choose to use it, it is now clear what they are opting into. This commit also simplifies the CXXRTL code generation for these format specifiers.
108 lines
2.6 KiB
C++
108 lines
2.6 KiB
C++
/*
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* yosys -- Yosys Open SYnthesis Suite
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*
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* Copyright (C) 2020 whitequark <whitequark@whitequark.org>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#ifndef FMT_H
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#define FMT_H
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#include "kernel/yosys.h"
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YOSYS_NAMESPACE_BEGIN
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// Verilog format argument, such as the arguments in:
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// $display("foo %d bar %01x", 4'b0, $signed(2'b11))
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struct VerilogFmtArg {
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enum {
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STRING = 0,
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INTEGER = 1,
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TIME = 2,
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} type;
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// All types
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std::string filename;
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unsigned first_line;
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// STRING type
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std::string str;
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// INTEGER type
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RTLIL::SigSpec sig;
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bool signed_ = false;
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// TIME type
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bool realtime = false;
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};
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// RTLIL format part, such as the substitutions in:
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// "foo {4:> 4du} bar {2:<01hs}"
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// Must be kept in sync with `struct fmt_part` in backends/cxxrtl/runtime/cxxrtl/cxxrtl.h!
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struct FmtPart {
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enum {
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STRING = 0,
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INTEGER = 1,
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CHARACTER = 2,
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VLOG_TIME = 3,
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} type;
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// STRING type
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std::string str;
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// INTEGER/CHARACTER types
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RTLIL::SigSpec sig;
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// INTEGER/CHARACTER/VLOG_TIME types
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enum {
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RIGHT = 0,
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LEFT = 1,
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} justify = RIGHT;
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char padding = '\0';
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size_t width = 0;
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// INTEGER type
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unsigned base = 10;
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bool signed_ = false;
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bool plus = false;
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// VLOG_TIME type
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bool realtime = false;
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};
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struct Fmt {
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public:
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std::vector<FmtPart> parts;
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void append_string(const std::string &str);
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void parse_rtlil(const RTLIL::Cell *cell);
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void emit_rtlil(RTLIL::Cell *cell) const;
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void parse_verilog(const std::vector<VerilogFmtArg> &args, bool sformat_like, int default_base, RTLIL::IdString task_name, RTLIL::IdString module_name);
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std::vector<VerilogFmtArg> emit_verilog() const;
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void emit_cxxrtl(std::ostream &os, std::string indent, std::function<void(const RTLIL::SigSpec &)> emit_sig, const std::string &context) const;
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std::string render() const;
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private:
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void apply_verilog_automatic_sizing_and_add(FmtPart &part);
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};
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YOSYS_NAMESPACE_END
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#endif
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