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yosys/backends/verilog
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Robert O'Callahan d24488d3a5 Instead of using builtin_ff_cell_types() directly, go through a method Cell::is_builtin_ff()
2025-09-17 03:24:19 +00:00
..
Makefile.inc initial import 2013-01-05 11:13:26 +01:00
verilog_backend.cc Instead of using builtin_ff_cell_types() directly, go through a method Cell::is_builtin_ff() 2025-09-17 03:24:19 +00:00
verilog_backend.h rename: add -unescape 2025-06-24 12:33:33 +02:00