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yosys/tests
Udi Finkelstein 6378e2cd46 First draft of Verilog parser support for specify blocks and parameters.
The only functionality of this code at the moment is to accept correct specify syntax and ignore it.
No part of the specify block is added to the AST
2018-03-27 14:34:00 +02:00
..
asicworld Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests. 2016-09-22 11:49:29 -06:00
bram Added support for (single-clock) transparent memories to bram tests 2016-11-01 10:03:13 +01:00
fsm Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests. 2016-09-22 11:49:29 -06:00
hana Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests. 2016-09-22 11:49:29 -06:00
memories Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests. 2016-09-22 11:49:29 -06:00
realmath Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests. 2016-09-22 11:49:29 -06:00
sat Allow $size and $bits in verilog mode, actually check test case 2017-09-29 11:56:43 +02:00
share Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests. 2016-09-22 11:49:29 -06:00
simple First draft of Verilog parser support for specify blocks and parameters. 2018-03-27 14:34:00 +02:00
smv Progress in SMV back-end 2015-06-19 14:08:46 +02:00
sva Major redesign of Verific SVA importer 2018-02-27 20:33:15 +01:00
techmap Added read-enable to memory model 2015-09-25 12:23:11 +02:00
tools Merge branch 'master' of https://github.com/brouhaha/yosys 2016-09-23 13:42:08 +02:00
unit Build hotfix in tests/unit/Makefile 2016-12-11 10:58:49 +01:00
various Added "pmuxtree" command 2015-04-07 20:27:10 +02:00
vloghtb bugfix in blif front-end 2015-05-18 11:15:49 +02:00