Mike Inouye 0314db80ea Correctly reset Verific flags to Yosys defaults after -import and warn this has occurred. ... Co-authored-by: Chris Pearce <chris@pearce.org.nz> Signed-off-by: Mike Inouye <mikeinouye@google.com>		2025-07-25 19:15:01 +00:00
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aiger
aiger2
ast	Merge pull request #4959 from YosysHQ/krys/primitive_array_error	2025-07-21 10:26:00 +12:00
blif
json
liberty
rpc
rtlil
verific	Correctly reset Verific flags to Yosys defaults after -import and warn this has occurred.	2025-07-25 19:15:01 +00:00
verilog	verilog: add support for SystemVerilog string literals.	2025-07-03 20:51:12 -06:00