mirror of
https://github.com/YosysHQ/yosys
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65 lines
710 B
CMake
65 lines
710 B
CMake
yosys_pass(synth_analogdevices
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synth_analogdevices.cc
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REQUIRES
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abc
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alumacc
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blackbox
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check
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chtype
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clean
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delete
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deminout
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dfflegalize
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flatten
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fsm
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hierarchy
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iopadmap
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memory
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memory_dff
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memory_libmap
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memory_map
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muxcover
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muxpack
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opt
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opt_clean
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opt_expr
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opt_lut_ins
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peepopt
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pmux2shiftx
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proc
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read_verilog
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select
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setattr
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share
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simplemap
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stat
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techmap
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tribuf
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wreduce
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write_edif
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xilinx_dffopt
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xilinx_dsp
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xilinx_srl
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zinit
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DATA_DIR
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analogdevices
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DATA_FILES
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cells_map.v
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cells_sim.v
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lutrams.txt
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lutrams_map.v
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brams_defs.vh
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brams.txt
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brams_map.v
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arith_map.v
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ff_map.v
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lut_map.v
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mux_map.v
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dsp_map.v
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abc9_model.v
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)
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