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yosys/tests
Jannis Harder c235802f4a
Merge pull request #3650 from jix/rtlil_roundtrip_z_bits
backends/rtlil: Do not shorten a value with z bits to 'x
2023-01-30 16:14:24 +01:00
..
aiger
arch fabulous: Allow adding extra custom prims and map rules 2022-11-17 13:34:58 +01:00
asicworld
bind
blif
bram
errors
fsm
hana
liberty
lut
memfile
memlib
memories
opt simplemap: Map $xnor to $_XNOR_ cells 2022-11-29 19:06:45 +01:00
opt_share
proc
realmath
rpc
sat
select
share
sim
simple
simple_abc9
smv
sva
svinterfaces
svtypes Resolve struct member package types 2023-01-29 13:51:44 -05:00
techmap add pmux option to bmuxmap for better fsm detection with verific frontend 2023-01-30 16:12:53 +01:00
tools
unit
various backends/rtlil: Do not shorten a value with z bits to 'x 2023-01-29 14:02:25 +01:00
verilog
vloghtb
xprop New xprop pass to encode 3-valued x-propagation using 2-valued logic 2022-11-30 19:01:28 +01:00
gen-tests-makefile.sh