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yosys/techlibs
History
Eddie Hung 5ce672d1c5 Merge remote-tracking branch 'origin/xaig' into xaig_dff
2019-06-17 12:14:55 -07:00
..
achronix Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
anlogic Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
common Make doc consistent 2019-06-14 10:32:46 -07:00
coolrunner2 Unify usage of noflatten among architectures 2019-01-04 11:37:25 +01:00
easic Fix typographical and grammatical errors and inconsistencies. 2019-01-02 13:12:17 +00:00
ecp5 Comment out dist RAM boxing on ECP5 for now 2019-06-14 10:42:30 -07:00
gowin Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-master 2019-04-22 09:09:27 +02:00
greenpak4 techlibs/greenpak4/cells_map.v: Harmonize whitespace within lut module 2019-02-26 09:40:46 -08:00
ice40 Resolve comments from @daveshah1 2019-06-14 12:00:02 -07:00
intel Fix formatting for synth_intel.cc 2019-05-09 08:40:05 -07:00
sf2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
xilinx Merge remote-tracking branch 'origin/xaig' into xaig_dff 2019-06-17 12:14:55 -07:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00