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Code
Activity
5c929a91c2
yosys
/
backends
History
Catherine
d9a4a42389
write_verilog: don't
assign
to a
reg
.
...
Fixes
#2035
.
2024-04-03 13:06:45 +02:00
..
aiger
blif
btor
cxxrtl
edif
firrtl
intersynth
jny
json
rtlil
simplec
tests: use /usr/bin/env for bash.
2023-08-12 11:59:39 +10:00
smt2
smv
spice
table
verilog
write_verilog: don't
assign
to a
reg
.
2024-04-03 13:06:45 +02:00