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yosys/tests/arch/common
Dan Ravensloft 1a07b330f8 intel_alm: Add multiply signedness to cells
Quartus assumes unsigned multiplication by default, breaking signed
multiplies, so add an input signedness parameter to the MISTRAL_MUL*
cells to propagate to Quartus' <family>_mac cells.
2020-08-26 22:50:16 +02:00
..
memory_attributes
add_sub.v
adffs.v
blockram.v
blockrom.v
counter.v
dffs.v
fsm.v
latches.v
logic.v
lutram.v
mul.v
mux.v
shifter.v
tribuf.v