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			116 lines
		
	
	
	
		
			2.4 KiB
		
	
	
	
		
			Text
		
	
	
	
	
	
			
		
		
	
	
			116 lines
		
	
	
	
		
			2.4 KiB
		
	
	
	
		
			Text
		
	
	
	
	
	
| Checklist for adding internal cell types
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| ========================================
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| 
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| Things to do right away:
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| 
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| 	- Add to kernel/celltypes.h (incl. eval() handling for non-mem cells)
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| 	- Add to InternalCellChecker::check() in kernel/rtlil.cc
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| 	- Add to techlibs/common/simlib.v
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| 	- Add to techlibs/common/techmap.v
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| 
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| Things to do after finalizing the cell interface:
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| 
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| 	- Add support to kernel/satgen.h for the new cell type
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| 	- Add to docs/source/CHAPTER_CellLib.rst (or just add a fixme to the bottom)
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| 	- Maybe add support to the Verilog backend for dumping such cells as expression
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| 
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| 
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| 
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| Checklist for creating Yosys releases
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| =====================================
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| 
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| Update the CHANGELOG file:
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| 
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| 	cd ~yosys
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| 	gitk &
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| 	vi CHANGELOG
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| 
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| 
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| Update and check documentation:
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| 
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| 	cd ~yosys
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| 	make docs
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| 	- sanity check the figures in docs/images
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| 	    - if there are any odd things -> investigate
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| 
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| 	cd ~yosys
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| 	vi README guidelines/*
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| 	- is the information provided in those file still up to date
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| 
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| 
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| Then with default config setting:
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| 
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| 	cd ~yosys
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| 	make vgtest
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| 
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| 	cd ~yosys
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| 	./yosys -p 'proc; show' tests/simple/fiedler-cooley.v
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| 	./yosys -p 'proc; opt; show' tests/simple/fiedler-cooley.v
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| 	./yosys -p 'synth; show' tests/simple/fiedler-cooley.v
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| 	./yosys -p 'synth_xilinx -top up3down5; show' tests/simple/fiedler-cooley.v
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| 
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| 	cd ~yosys/examples/cmos
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| 	bash testbench.sh
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| 
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| 	cd ~yosys/examples/basys3
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| 	bash run.sh
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| 
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| 
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| Test building plugins with various of the standard passes:
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| 
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| 	yosys-config --build test.so equiv_simple.cc
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| 	- also check the code examples in guidelines/GettingStarted
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| 
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| 
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| And if a version of the verific library is currently available:
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| 
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| 	cd ~yosys
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| 	cat frontends/verific/build_amd64.txt
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| 	- follow instructions
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| 
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| 	cd frontends/verific
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| 	../../yosys test_navre.ys
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| 
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| 
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| Finally run all tests with "make config-{clang,gcc,gcc-4.8}":
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| 
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| 	cd ~yosys
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| 	make clean
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| 	make test
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| 	make ystests
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| 	make vloghtb
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| 	make install
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| 
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| 	cd ~yosys-bigsim
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| 	make clean
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| 	make full
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| 
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| 	cd ~vloghammer
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| 	make purge gen_issues gen_samples
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| 	make SYN_LIST="yosys" SIM_LIST="icarus yosim verilator" REPORT_FULL=1 world
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| 	chromium-browser report.html
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| 
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| 
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| Release:
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| 
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| 	- set YOSYS_VER to x.y.z in Makefile
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| 	- remove "bumpversion" target from Makefile
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| 	- update version string in CHANGELOG
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| 	git commit -am "Yosys x.y.z"
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| 
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| 	- push tag to github
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| 	- post changelog on github
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| 	- post short release note on reddit
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| 
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| 
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| Updating the website:
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| 
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| 	cd ~yosys
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| 	make install
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| 
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| 	cd ~yosys-web
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| 	make update_show
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| 	git commit -am update
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| 	make push
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| 
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| 	- Read the Docs updates handled by Jenkins on source change
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