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yosys/kernel
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Jannis Harder 56572978f5 drivertools: Utility code for indexing and traversing signal drivers 
It adds `DriveBit`, `DriveChunk` and `DriveSpec` types which are similar
to `SigBit`, `SigChunk` and `SigSpec` but can also directly represent
cell ports, undriven bits and multiple drivers. For indexing an RTLIL
module and for querying signal drivers it comes with a `DriverMap` type
which is somewhat similar to a `SigMap` but is guaranteed to produce
signal drivers as returned representatives.

A `DriverMap` can also optionally preserve connections via intermediate
wires (e.g. querying the driver of a cell input port will return a
connected intermediate wire, querying the driver of that wire will
return the cell output port that's driving the wire).
2024-08-21 11:00:21 +01:00
..
binding.cc Generate an RTLIL representation of bind constructs 2021-08-13 17:11:35 -06:00
binding.h Generate an RTLIL representation of bind constructs 2021-08-13 17:11:35 -06:00
bitpattern.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
calc.cc Add bitwise $bweqx and $bwmux cells 2022-11-30 18:24:35 +01:00
cellaigs.cc cellaigs: Drop initializer list in call to IdString::in 2023-08-14 11:42:19 +02:00
cellaigs.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
celledges.cc celledges: Register async FF paths 2024-03-11 10:45:36 +01:00
celledges.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
celltypes.h Add builtin celltype $scopeinfo 2024-02-06 17:51:24 +01:00
consteval.h Remove set but unused variable 2022-05-27 12:37:03 +02:00
constids.inc techmap: Support dynamic cell types 2024-05-03 13:33:28 +02:00
cost.cc cost: add model for techmapped cell count, keep_hierarchy pass with -min_cost parameter 2024-07-29 10:26:02 +02:00
cost.h cost: add model for techmapped cell count, keep_hierarchy pass with -min_cost parameter 2024-07-29 10:26:02 +02:00
driver.cc Typo fixup(s) 2024-03-18 11:09:23 +13:00
drivertools.cc drivertools: Utility code for indexing and traversing signal drivers 2024-08-21 11:00:21 +01:00
drivertools.h drivertools: Utility code for indexing and traversing signal drivers 2024-08-21 11:00:21 +01:00
ff.cc Add the $anyinit cell and the formalff pass 2022-08-16 13:37:30 +02:00
ff.h Add the $anyinit cell and the formalff pass 2022-08-16 13:37:30 +02:00
ffinit.h Add new helper class for merging FFs into cells, use for memory_dff. 2021-05-23 14:46:59 +02:00
ffmerge.cc Fix a regression from #3035. 2021-10-08 15:44:07 +02:00
ffmerge.h Add new helper class for merging FFs into cells, use for memory_dff. 2021-05-23 14:46:59 +02:00
fmt.cc fmt: if enabled, group padding zeroes. 2024-04-02 12:13:22 +02:00
fmt.h fmt,cxxrtl: add option to group digits in numbers. 2024-04-02 12:13:22 +02:00
fstdata.cc Fixes for some of clang scan-build detected issues 2023-01-17 12:58:08 +01:00
fstdata.h Start restoring memory state from VCD/FST 2022-05-04 10:41:04 +02:00
hashlib.h Merge pull request #4471 from georgerennie/hashlib_primes 2024-07-29 15:10:22 +02:00
json.cc Support for BTOR witness to Yosys witness conversion 2023-01-11 18:07:16 +01:00
json.h Support for BTOR witness to Yosys witness conversion 2023-01-11 18:07:16 +01:00
log.cc kernel/log: Add log_str helper for custom log_* functions/overloads 2024-08-21 10:58:39 +01:00
log.h kernel/log: Add log_str helper for custom log_* functions/overloads 2024-08-21 10:58:39 +01:00
macc.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
mem.cc mem: only import attributes from ports if the memory doesn't have them yet 2023-10-30 16:31:53 +01:00
mem.h Add proc_rom pass. 2022-05-13 00:37:14 +02:00
modtools.h remove template declaration that stops function from being used 2023-01-11 16:09:05 +01:00
qcsat.cc Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00
qcsat.h Refactor common parts of SAT-using optimizations into a helper. 2021-08-09 16:54:35 +02:00
register.cc Merge branch 'origin/master' into krys/docs 2024-03-18 10:39:30 +13:00
register.h kernel: Avoid including files outside include guards 2024-04-02 16:53:56 +02:00
rtlil.cc kernel/rtlil: Add SigBit operator[](int offset) to SigChunk 2024-08-21 10:58:39 +01:00
rtlil.h kernel/rtlil: Add SigBit operator[](int offset) to SigChunk 2024-08-21 10:58:39 +01:00
satgen.cc Add builtin celltype $scopeinfo 2024-02-06 17:51:24 +01:00
satgen.h sat: Add -set-def-formal option to force defined $any* outputs 2022-11-28 14:50:52 +01:00
scopeinfo.cc Add scopeinfo index/lookup utils 2024-02-06 18:01:26 +01:00
scopeinfo.h Add scopeinfo index/lookup utils 2024-02-06 18:01:26 +01:00
sigtools.h sigmap: comments 2024-07-18 16:02:11 +02:00
timinginfo.h sta: very crude static timing analysis pass 2021-11-25 17:20:27 +01:00
topo_scc.h Add generic topological sort and SCC detection 2024-08-21 10:58:39 +01:00
utils.h utils: Save detected loops with their nodes in-order 2024-03-11 10:43:49 +01:00
yosys.cc Simplified run_frontend by using a lambda function for file extension checks and combining blif and eblif into a single condition. 2024-07-23 17:55:04 +02:00
yosys.h kernel: Avoid including files outside include guards 2024-04-02 16:53:56 +02:00
yosys_common.h Make C++17 compiler required 2024-06-17 16:55:36 +02:00
yw.cc Remove a statement without effect. 2023-04-17 10:53:05 -07:00
yw.h sim/formalff: Clock handling for yw cosim 2023-01-11 18:07:16 +01:00